k0b0's record.

Computer Engineering, Arts and Books

UCB's high-performance RISC-V core BROOM

f:id:k0b0:20180204144849p:plain

UCB announced high performance RISC-V core BROOM with Hot Chips 30.

The ISA of BROOM is RV64G, and the instruction issuing method is OoO. It is higher performance than in-order RocketCore which is currently open.By the way, Chisel is used for hardware design.

ROOM's microarchitecture is BOOM (Berkeley Out-of-Order Machine), but what is the difference between BROOM and BOOM?

For details on BROOM, see below.

news.mynavi.jp